查询词典 vin

The Inhibit control (pin 3) has an internal pull-up to Vin, and if left open-circuit the module will operate when input power is applied.

抑制控制（引脚3）有一个内部上拉至VIN，如果离开了开路模块将输入功率运行时应用。

Only 38 per cent of the crop went into Latour 2006 grand vin and 36 per cent for Chateau Margaux.

拉图城堡只用了38%的葡萄用来酿造其头等苑，而玛歌古堡也只用了收成的36%。

By the time the coq au vin is bubbling nicely, Mr Millard has gone out somewhere.

等酒焖仔鸡快焖好的时候，米勒德已经走出去了。

Pulse width generator 404 delays the output signal VIN of NAND gate 403 to generate an output signal VOUT.

脉冲宽度发生器404延迟NAND门403的输出信号VIN从而生成输出信号VOUT。

Inverters 505 and 506 are coupled together in series between NAND gate 403 at VIN and a second input of multiplexer 510 to form a second delay path.

反相器505和506在NAND门403的VIN和乘法器510的第二输入端之间串联耦合到一起从而形成第二延迟路径。

Inverters 501-504 are coupled together in series between NAND gate 403 at VIN and a first input of multiplexer 510 to form a first delay path.

反相器501-504在NAND门403的VIN和乘法器510的第一输入端之间串联耦合到一起从而形成第一延迟路径。

After the UP and DN signals both become a logic high at the same time, NAND gate 403 generates a falling edge on VIN.

在UP和DN信号同时都变为逻辑高电平后，NAND门403产生VIN的下降沿。

After the UP and DN signals transition to a logic low, NAND gate 403 generates a rising edge in VIN, and pulse width generator 404 generates a rising edge in VOUT a delayed period of time later.

在UP和DN信号转换到逻辑低电平后，NAND门403在VIN中生成上升沿，且脉冲宽度发生器404在延迟时间段后在VOUT中生成上升沿。

NAND gate 403 is a logic gate that performs a NAND Boolean logic function on the UP and DN signals to generate a voltage signal VIN.

NAND门403是对UP和DN信号执行NAND布尔逻辑功能以生成电压信号VIN的逻辑门。

In mild cases of VIN, the cells may return to normal form.

在温和的案件将VIN ，细胞可能恢复正常的形式。

We have limited budget let me know if you can do this competitively.

我们有限的预算让我知道如果你能做到这一点竞争力。

We don't know how other critters breathe--lizards, for example.

我们还不知道诸如蜥蜴之类的动物如何呼吸。