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频率计

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This cymometer uses FPGA to realize the measuring count of frequency、period、pulse width and occupy-empty ratio.

摘要本文主要论述了利用FPGA进行测频计数,单片机实施控制实现多功能频率计的设计过程。

Digital Cymometer process, through assembly language to write, and plus a lot of comment statement, the experience of a little compilation of people who are not difficult to understand.

详细说明:数字频率计的程序,通过汇编语言来编写,并加了很多注释语句,对有点汇编经验的人来说,看懂不是难事。

The problems can be sort out by the SCM and 'multiple function digital cymometer' which is designed with periphery circuit.

本文采用单片机技术结合外围电路设计的"多功能数字频率计"可较好的解决这个问题。

With a self-developed data acquisition card connected to PC,a digital storage oscillographwith the function of cymometer and spectrum analyzer is developed.

使用自主开发的数据采集卡,最终实现了基于PC平台的,具有频率计和频谱分析仪功能的数字存储示波器系统。

With a self-developed data acquisition card connected to PC,a digital storage oscilloscopewith the function of cymometer and spectrum analyzer is developed.

使用自主开发的数据采集卡,最终实现了基于PC平台的,具有频率计和频谱分析仪功能的数字存储示波器系统。

It is composed of circuit of the modules to originally design, including various integrate one , simple and easy digital cymometer based on the logic device , simple electronic device.

本设计是由模块电路组成的,包括各种集成块、逻辑器件、简单的电子器件为基础的简易数字频率计

This paper describes a feasible calibration method, its basic principle for calibrating is: A certain function relationship is existed in equivalent inductance L of coil and the distance x between the object to be measured and the sensor coil, the measurements can be conducted with this function relationship by using frequency modulation. The calibrating system consists of measuring electric circuit, high stable voltage power supply, digital frequency meter, the conductor to be measured and the calibrated displacement sensor.

文中叙述了一种较为可行的标定方法,其标定的基本原理为:线圈的等效电感L和被测物体与传感器线圈的距离x存在一定的函数关系,利用这种函数关系用调频法进行测量,标定系统由测量电路、高稳定度稳压电源、数字频率计、被测导体及被校位移传感器组成。

Digital frequency of software have been tested, and the error analysis.

数字频率计的软件均经过测试,并进行了误差分析。

According to all of Synchronous Digital Block diagram of the frequency measurement using VHDL,the successful preparation of the design process,and in MAX+PLUS II software environment,the preparation of procedures for VHDL simulation,obtained very good results.

根据全同步数字频率计的测频原理方框图,采用VHDL语言,成功编写出了设计程序,并在MAX+PLUSⅡ软件环境中,对编写的VHDL程序进了仿真,得到了很好的效果。

Digital frequency meter based on the principle of frequency measurement block diagram, using Verilog HDL language, the success of the preparation of a design process, and QuartusII software environment, the preparation of the Verilog HDL simulation program has been very good results.

根据数字频率计的测频原理方框图,采用Verilog HDL语言,成功的编写出了设计程序,并在QuartusII软件环境中,对编写的Verilog HDL程序进行了仿真,得到了很好的效果。

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