传送器

A modem is required to transmit data over telephone line in a network, since telephone line only carry signal.

在网络中，用电话线传送信息是需要调制解调器，因为电话线是用信号传送信息。

To transfer data from the computer memory to some ancillary online device, such as a PROM programmer or cassette recorder

将数据从计算机内存传送到外部设备，如PROM编程器或盒式记录器。

The Parameter Editor allows you to access the parameters on the digitizer, manipulate them, and send

参数编辑器允许你访问数字记录器上的参数，修改它们，并传送回去—改变数字记录器的运行状态。

In this study, the architecture of the remote alert system is:(1) the inner controller of the factory mechanical equipment connects to the webpage control server,(2) the webpage control server conveys the operation state of the equipment controller to the remote alert system by the network,(3) the fore-end process module of the alert system receives the equipment abnormal messages, according to the user define parameters, the rear-end process module of the alert system issues the alert.

本研究之示警系统架构为：(1)工厂机械设备之内部控制器接至网页控制伺服器，(2)网页控制伺服器经乙太网将设备控制器之重要运转态传送至示警系统伺服器，(3)示警系统之前置处模组接收设备常资讯，并依据设定之服务，调阅系统中引模组，并透过系统之讯息执模组进警示资讯的发布。

The purpose of this research is to measure the different EOG (Electro-Oculography, EOG) signals resulted from eye movements. The measured voltages will be transmitted to VCO (Voltage Controled Oscilloator, VCO), and then VCO will transfer the different voltages to different frequencies of square waveform signals. The square waveform signals can replace the pulse trains generated by circle disk encoder, as the input signal of infra red sensor in the mechanical mouse.

本论文主要研究目的，乃是应用眼电图法(Electro-Oculography， EOG)来量测眼球运动所产生的电压讯号，以EOG方式量测到的电压，再经由电压控制震荡器(Voltage Controled Oscilloator，VCO)转换成不同频率的方波，VCO并将方波讯号传送给滑鼠的红外线感应器，以替代轨迹球滚动时其带动圆盘编码器所产生的脉波。

Some common features of FMSs are pallet changers, underfloor conveyor systems for the collection of chips, and a conveyor system that delivers parts to the machine.

FMS的一些常见特征有夹板更换器、收集铁屑的地下传送系统和将零件送至机器的传送系统。

The same size transport bone disc was created mesially by osteotomy on left side and corticotomy on right side. TiNi-SMA distractor was implanted to repair defect.

左侧骨传送盘行颊舌侧全层截骨术，右侧骨传送盘行保留部分松质骨的皮质切开术，置入镍钛记忆合金牵张器。

The connection converting apparatus includes: a hook detector for detecting a hooked state of the telephone; a relay for connecting the telephone to either the Internet or the PSTN according to a commmand; a duplex circuit for suppressing voice leakage and side tone by converting and reconverting from a two-line signal of the telephone to a four-line signal for transmission and reception; a tone decoder for decoding a DTMF tone of the telephone; and a microprocessor for exchanging control data for the user's computer, controlling the relay to cause the telephone to be connected to the Internet when the hook detector detects an off-the-hook state of the telephone, and providing number data to the user's computer when the microprocessor receives number data from the tone decoder.

所述连接转换装置包括：用于检测所述电话的摘机状态的摘机检测器；用于根据命令将所述电话连接到互联网或PSTN的转接器；用于通过从所述电话的双路信号到用来传送和接收的四路信号之间的转换及复原来抑制声音泄漏和侧音的双工电路；用于对所述电话的DTMF音进行解码的音频解码器；以及微处理器，其用于交换来自所述用户的计算机的控制数据、控制所述转接器以使所述电话在所述摘机检测器检测到所述电话的摘机状态时连接到互联网、以及在所述微处理器接收到来自所述音频解码器的号码数据时向所述用户的计算机提供号码数据。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

I'm strongly against the death penalty — it's an eye for an eye.

我不赞成死刑——这是以牙还牙的报复行为。

And to get you the support you need, we're enlisting all elements of our national power: our diplomacy and development, our economic might and our moral suasion, so that you and the rest of our military do not bear the burden of our security alone.

并给你们所须的支援，我们正徵召国家所有各种的力量：我们的外交及发展，我们的经济力量与道德劝说，所以你们与其他军人不须要孤独地负起国家安全的责任。