查询词典 ordered pair

Five pairs of 45S rDNA loci and two pairs of 5S rDNA signals were detected on chromosomes of Cucurbita moschata Duch. Luffa cylindrical Roem. contained five pairs of 45S rDNA loci and one pair of 5S rDNA loci. In Benincasa hispida Cogn., two pairs of 45S rDNA sites and one pair of 5S rDNA site were detected. In this species, 5S rDNA and one pair of the 45S loci were collocated closely in chromosome 7S. 45S rDNA chromosomal distribution patterns were highly conserved among the three species, althoufh their number varied markedly. The 5S rDNA sites on chromosomes among the three species were highly polymorphic.

南瓜有5对45S rDNA位点， 2对5S rDNA位点；丝瓜具有5对45S rDNA位点， 1对5S rDNA位点；冬瓜具有2对45S rDNA位点， 1对5S rDNA位点， 5S rDNA位点与其中一对45S rDNA位点都位于7号染色体短臂上，并在物理位置上紧密相邻。45S rDNA在这3种作物染色体上数目变化较大，但在染色体上都倾向分布在短臂末端，其分布模式较为一致。5S rDNA在这3种作物染色体上数目相对保守，但在染色体上分布的位置变化较大。

Furthermore,the optimal approximation bisymmetric solution pair to a given bisymmetric matrix pair in Frobenius norm can be obtained by finding the least norm bisymmetric solution pair of new matrix equation ,where .

另外，给定双对称矩阵对，通过求矩阵方程的双对称解对，得到它的最佳逼近双对称解对。

Furthermore, the optimal approximation centrosymmetric solution pair to a given centrosymmetric matrix pair in Frobenius norm can be obtained by finding the least norm centrosymmetric solution pair of new matrix equation ,where .

另外，给定中心对称矩阵对，通过求矩阵方程的中心对称解对，得到它的最佳逼近中心对称解对。

The illicit collect that our market habit weighs calls pair of strong fund in the world, the data shows, pair of strong fund of Hong Kong should pass an expatiatory license to file an order, examine strictly what include pair of fund managers.

我们市场习惯所称的私募在国际上叫对冲基金，资料显示，香港的对冲基金要经过一个冗长的许可申请程序，包括对基金经理的严格审查。

At first, using the gravitation mode the article confirms the range of Xi'an district, then the article carries on the analysis of the distance optimizing, economic linking, perimeter urban industry basic and water resources protection, then propose " a pair of axis "and" a pair of level " mode, and establish the xi'an satellite city, they are Xianyang, Lintong, Changan, Yanliang, Gaoling, Huxian, Xingping , Liquan , Jingyang , Sanyuan , Qianxian. Then on the basis of analyzing the industry shift of Xi'an, he article confirm the function of every satellite city; At the same time point out the study and adjust of Xi'an satellite city should be strengthened, and strengthen the industrialization construction of the infrastructure, then propose to build one pair of rings structure of traffic facilities.

文章首先应用引力模式确定西安都市区范围，继尔经过优化距离分析、经济联系紧密度分析、周边城镇产业基础分析及水资源保护限制分析后，提出了&双轴线、双层次&发展布局模式，确立了西安包括咸阳、临潼、高陵、户县、兴平、礼泉、泾阳、三原、乾县、阎良、长安十一个卫星城；继而在分析西安市产业梯次转移的基础上，确定了各卫星城的职能；同时指出要加强西安卫星城基础设施发展的研究及调控，要加强基础设施产业化建设，提出建设交通设施的双环结构。

The haemal analyzer that good, standardization operates methodological choice property compares appearance to join, new blood calibration compares the healthy person that is worth surely with this instrument pair of blood analyzer , into travel by a definite date 3 months compare pair of experiments, establish the acceptable range that is worth opposite deviation lowlier than comparing pair of parameter WBC, RBC, HGB, HCT, PLT to appearance, mediumly, high.

方法选择性能良好、规范化操作的血液分析仪为参比仪，用该仪器定值的健康人新鲜血校准比对血液分析仪，进行为期3个月比对实验，建立比对仪比对参数WBC、RBC、HGB、HCT、PLT低、中、高值相对偏差的可接受范围。

The stereo image pair is acquired by a pair of calibrated cameras. Global disparity of foot is estimated at first. After the image pair is preprocessed automatically, using non-contact information-collecting technique and phase-correlation method, which is based on complex wavelet, surface matching with sub-pixel accuracy in the frequency domain is carried out. By taking order matching constraint, continuity constraint and correlation constraint together, 3D point cloud of foot is reconstructed and 3D model of foot is built by mosaicking point cloud at various angles automatically. After normalization, high-order moments are compared, which is useful for the subsequent shoe last design.

运用已标定的双目照相机拍摄立体图像对，进行足部整体视差估计；在对立体图像对进行自动预处理后，采用非接触式的信息采集技术，运用基于复小波的相位相关技术对足部表面进行亚像素级小区域频域匹配，考虑顺序匹配约束、连续性约束和相关性约束条件，重建足部密集三维点云信息，并自动拼接不同角度点云生成相应的足部三维模型；对其归一化后，提取其高阶矩向量进行比对，为后续的三维鞋楦设计提供必要信息。

On ornamental boxes everything is also in pairs: a pair of birds, a pair of deer, a pair of ibexes.

在这些装饰盒上，每样东西也都是成双成对的：一对鸟，一对鹿，一对野山羊。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

Don not attempt to do something which you can not to do.

不要企图做那些办不到的事情。

The expression of CTGF and TNF-αweredetected by immunochemistry and the number of Clara Cells was calculated.

光镜下观察肺组织的病理变化，采用免疫组化染色观察肺组织中结缔组织生长因子和肿瘤坏死因子-α的表达和Clara细胞的数量。