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instruction register相关的网络例句

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与 instruction register 相关的网络例句 [注:此内容来源于网络,仅供参考]

This paper evaluates the register requirements of software-pipelined loops and presents three new methods for software pipelining loops that require more static general registers than those available in Itanium processor. They reduce register pressure by either reducing instructions in the loop body or allocating stacked non-rotating registers or rotating register in register stack to serve as static registers.

在Itanium处理机上评估了NAS和SPEC2000基准程序中的软件流水循环的寄存器需求,发现静态寄存器不足是造成软件流水失败的主要原因,提出了3种增加软件流水个数、提高软件流水有效性的算法:限制循环展开因子的算法(register sensitive unrolling,简称RSU)、堆栈寄存器分配算法(stacked registerallocation,简称SRA)以及变量类型转换的算法(variabletype conversion,简称VTC)。

Next we load drive number into dl register, head number into dh register, track number into ch register, sector number into cl register and the number of sectors to be transferred to registeral.

载入驱动器 ID 到 dl 寄存器,磁头号到 dh ,磁道号到 ch ,扇区号到 cl ,扇区数到 al 。

METHODS: A linked register study using information from the Malmo Primary SS Register, Swedish Cancer Register, and Cause-of-Death Register for calculation of SIRs was carried out.

利用来自于为了计算标准化比率的马尔默首要SS注册中心,瑞典肿瘤注册中心,死亡原因注册中的信息,执行联系性登记研究。

Register is one of the most valuable resources. Software pipelining could bring about register pressure while scheduling instruction of VLIW DSP, which would cause register spill and software pipelining suspension.

寄存器是程序运行时最宝贵的资源之一,软件流水在对VLIW DSP指令调度的同时,会显著增加寄存器的压力,从而导致寄存器溢出,软件流水中止。

If one instruction stores a value in a register, and the next instruction tries to use that register as an operand, then the machine may have to stall waiting for that result to become available.

如果一条指令在某个寄存器中保存了一个值,而下一条指令尝试使用该寄存器作为操作数,那么机器也许不得不暂停来等待结果可用。

The target of the jump instruction itself may be hidden by computing its address in a register and using an indirect jump instruction to transfer control to the address in that register.

可能通过在某个寄存器中计算目标地址、并且使用间接跳转指令把控制传给该寄存器中的地址,把跳转指令本身的目标隐藏起来。

Based on a lot of experiment results, a conclusion is drawn: comparing with other factors, the performance of branch handling strategy is the key limits of processor to exploit the instruction level parallelism existed in nonscientific code, cache miss have severe effect on superscalar processor's performance when it runs scientific code. Second, in order to reduce the branch penalty and improve the performance of superscalar processor, a new branch handling strategy—a classification based hierarchical branch handling strategy, CHBHS is proposed. It first expands the traditional processor architecture to support multiple condition code, conditional execution and Mbranch instruction, as a result, compiler can reduce the number of static conditional branch when the code is generated. Then, CHBHS tries to use the best suitable mechanism to deal with different branch base on their different behavior. CHBHS can predict the target address of unconditional branch, subroutine call and conditional branch by buffering their target address in branch target buffer, a newly proposed high efficient return address stack is used to reduce the penalty of subroutine return instruction, a new Counter Register Stack is also proposed to reduce the penalty of loop-closing branch to zero, and dynamic branch predictor is incorporate with branch target buffer to predict the outcome of conditional branch.

基于上述结论,为了尽量消除转移指令对处理器开发指令级并行性能力的影响,进一步提高处理器性能,在详尽分析目前已存在的转移处理策略的特点与局限性的基础上,首次提出了一种新的转移处理策略即基于分类的层次转移处理策略CHBHS(Classification Based Hierarchical Branch Handling Strategy),它首先通过扩展传统的体系结构,支持多条件码、条件式执行及多分支转移技术,以使编译程序在进行代码生成时可尽量少生成条件转移指令,从而减少静态条件转移指令的数目;其次,基于不同的转移指令的行为不同这一事实,提出了对不同的转移指令采用不同的机制进行处理的思想,即对无条件转移指令和函数调用指令以及条件转移指令的目标地址,采用转移目标缓冲器来预测,对于函数返回指令,采用所提出一种的高效返回地址栈来预测其目标地址,对于大多数循环控制转移指令,采用所提出的Counter Register Stack来将其所可能带来的损失减少为0,对于其他的条件转移指令采用动态预测机制来预测其方向。

My paper herein enterprisingly develop a network based instruction support system named"Vclass ", theoretically explore problems involved in the revolution of network based instruction model and instruction activity, where the instruction based on"Vclass"platform is instantiated for study.

该网络教学系统在如下几个方面取得了突破:(1)国内第一个完整集成的网络教学平台,集成了教务管理,网络教学,课程开发工具,教学资源管理四个方面的支持功能,可全面支持网上教学的各个环节;(2)首次将适应性学习的概念引进远程教育中,使得远程教育系统可以针对不同能力层次的学习群体,自动提供不同层次的教学内容。

Conventional BTB is looked up while instruction fetcher is fetching an instruction. The result returned from BTB tells instruction fetcher the address of the next instruction.

一般的分支目标缓冲器是在每次抓取指令时进行存取,并由其结果决定下次从那个位址抓取指令。

The blocks we designed including the instruction predecoder, the instruction fetcher, the instruction decoder, the instruction dispatching, the data access unit, and the data address generator A primitive software simulation was built to evaluate the effect of every solution.

并以软体模拟评估重要实作方案的可行性、复杂度、硬体成本及效能,来确定重要的设计决策。

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推荐网络例句

It's rather showy.I'd like something plainer.

赶花了,我想要素净些的。

The Kremlins Spassky Tower and passers-by are reflected in the wet cobblestones of Moscows Red Square on Feb.

克里姆林宫的斯巴斯克塔和旅客的身影倒映在潮湿的鹅卵石墙上。

Aldus Leonard Huxley, American writer

美国作家郝胥黎。A.L。