查询词典 drill bit
- 与 drill bit 相关的网络例句 [注:此内容来源于网络,仅供参考]
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Particularly, the neutral anion fluorescence chemical sensor uses cholic acid molecules as the molecule frame, and introduces a neutral thiourea or ureido to the positions of a 3 bit carbon atom and a 24 bit carbon atom to be used as a bonding unit; a fluorescence chemical functional group is introduced to the positions of the 3 bit carbon atom and the 24 bit carbon atom or to other positions and used as a signal unit, and then a neutral anion fluorescence chemical sensor is synthesized.
具体而言是以胆酸分子为分子骨架,在其3位碳原子和24位碳原子上引入中性硫脲或脲基,作为键合单元;在3位碳原子和24位碳原子上或其他位置引入具有荧光化学官能团,作为信号单元,合成中性阴离子荧光化学传感器。
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The new bit ′ s cone and bearing are much larger than those of the three cone bit with the same size,therefore the new bit can bear a greater WOB,thus,the life of the bearing and cone can be prolonged and then the penetration rate can be raised and the length of bit run prolonged.
与相同钻头尺寸的三牙轮钻头相比,该新型钻头的牙轮尺寸和轴承尺寸要大得多,因此,它可以承受较大的钻压,从而可以提高轴承和牙轮的使用寿命,进而提高机械钻速和钻头的使用寿命。
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The monochrome mode bypasses these modules and basically serializes the data in FIFOH (and FIFOL if a dual scan display type is used) into 4-bit (or 8-bit if a 4-bit dual scan or 8-bit single scan display type is used) streams by shifting the video data to the LCD driver.
单色模式则不需要这些模块,基本上通过转换视频数据使 FIFOH(如果是双扫描显示类型则还有 FIFOL)的数据串行化为 4 位(若为 4 位双扫描或 8 位单扫描显示类型时为 8 位)数据流到 LCD 驱动器。
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Because of the lower rock fragmentation efficiency and defective geometrical shape of chisel bit, Sweden has replaced chisel bit with taper connecting cross chisel bit and button bit since the mid seventies.
中文摘要:因一字形钎头破岩效率低和几何形状结构缺陷等问题,瑞典从70年代中期就用锥体连接的十字和球齿钎头取代了一字形钎头。
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Research on cone/bit speed ratio simulation model of tri-cone bit s;2. In this paper, the kinematics simulation model of tri-cone bit s was established according to the roller cone bit geometry and kinematics.
根据钻头几何学和运动学建立起了随钻运动的三牙轮钻头的计算机运动学仿真模型,该仿真模型既表示出了钻头上各牙齿的形状、大小和在钻头上的分布情况,又可真实反映钻头钻进过程中各牙齿的瞬时位置和相互关系。
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MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available
MAX1999EEI引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可
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TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available
TDA4864引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可
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I can imagine the "floating weeds wind and rain" in memory and the health bit by bit, that the scenes had her heart torn bit by bit, and she Tilei Cross in this cruel memories of floating, And a broken heart.
我能想像到&风雨飘萍&在回忆和健的点点滴滴时,那曾经的一幕幕将她的心一点一点地撕裂,而她就涕泪交加地在这片残酷的回忆中浮沉着,并心碎着。
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Drill tools, coring bit and casing bit have been designed and a complete set of equipments and tools have been formed. Rules of operation have been made to operate these equipments more proficiently.
完成了空气潜孔锤跟管取心钻具、取心钻头、套管钻头的研制,并配套了合理的设备和器具,制订了实用、操作性强的空气潜孔捶跟管取心钻进技术规程。
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It is widely applied in core drill with diamond bit or hard tungsten-carbide tipped bit in the field of geology, metallurgy, coal mine, hydrological and engineering drilling.
这是广泛应用在核心的演练与金刚石钻头或硬硬质合金打破位在该领域的地质,冶金,煤矿,水文和工程钻探。
- 相关中文对照歌词
- Pimp Drill
- Drill Team
- Little Bit Of Life
- Twice My Age
- Drilled A Wire Through My Cheek
- 8-Bit World
- Just A Little Bit
- A Little Bit
- A Little Bit Of Love (Is All It Takes)
- Closer
- 推荐网络例句
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A historical region of southwest France between the Pyrenees and the Garonne River. The duchy of Aquitaine was joined with France after the marriage of Eleanor of Aquitaine to King Louis VII in1137, but its possession was disputed after her subsequent marriage to Henry II of England.
阿基坦法国西南部一个历史地区,位于比利牛斯山和加隆河之间,在1137年阿基坦的埃莉诺与国王路易斯七世结婚之后阿基坦公国加入法国,但当她再嫁英国亨利二世后,其归属权便受到争议
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There are moments when I look at the smiling , happy faces of my expectant staff and wonder how they will cope when confronted by an outraged housemaster along with an unrepentant and recalcitrant bleached blond teenager in 18 years ' time .
有时候,我看着那些满怀期待的员工微笑,幸福的脸,想着当他们遇到一位愤怒的宿舍管理员和一位不知悔改,叛逆,而且将头发染成白色的18岁少年时,他们会如何处理。
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In the crossing belt of town and country, the farmers manifest the plentifulness, complexity of social life in this area, especial young farmer, so creating the souls of common people, particular the soul world of young fanners, is the most particular aesthetic phenomenon.
在城乡交叉地带中,最能显示这一区域社会生活丰富复杂性的社会阶层就是农民,特别是青年农民,所以塑造这一地带平凡众生的心灵,特别是青年农民的心灵世界,是路遥小说最独特的审美现象。