cache memory相关的网络例句

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与 cache memory 相关的网络例句 [注：此内容来源于网络，仅供参考]

On later stage of history of ethnicity, they have had their own characters . Gradually, the proportion of inscribed memory in ethnic memory increases. The inscribed memory has accelerated the completion of the self-representation of Zhuang.

在族群记忆的后期，即由唐宋到明清、民国时期，随着壮族族群文字的发明和传播，刻写记忆在族群记忆中所占的比重逐渐增大，(来源：ABCcac6ca论文网www.abclunwen.com)刻写的记忆以身体记忆前所未有的效率促成了族群自我表象的形成。

This paper studies the effect of consequent post heat treatment on the mechanical property and shape memory ratio of the welded TiNi joints in TiNi shape memory alloy precise pulse resistance butt welding,analyzes the joint structures and fractographies affecting mechanical property and shape memory ratio of welded joint by using strength testing, SEM and TEM, gets the optimum welding parameters obtaining good shape recovery ratio welded joint, and has discovered the inherent reason for proper consequent post heat treatment to promote the joint shape recovery ratio from microcosmic point.

摘要：采用拉伸测试、SEM、TEM和定点成分能谱分析等手段研究了随机后热处理对TiNi形状记忆合金精密脉冲电阻对焊焊接接头力学性能、形状恢复率的影响，并对影响接头力学性能和形状恢复率的接头组织和形貌进行了研究，得出了获得具有较高形状恢复率接头的焊接参数，从微观角度揭示了随机后热处理提高接头形状恢复率的内在原因，为TiNi形状记忆合金的开发和应用提供了基础，具有重大的理论和实际应用价值。

Soft focus and the skills of suspended page - fast memory method - memory training | ultra right-brain Photographic Memory | Speed Reading Training ...

软焦点和悬页的技巧-快速记忆法-记忆力训练|超右脑照相记忆|速读训练。。。

Eatures · Compatible with MCS-51 Products · 2K Bytes of Reprogrammable Flash Memory – Endurance: 1,000 Write/Erase Cycles · 2.7V to 6V Operating Range · Fully Static Operation: 0 Hz to 24 MHz · Two-Level Program Memory Lock · 128 x 8-Bit Internal RAM · 15 Programmable I/O Lines · Two 16-Bit Timer/Counters · Six Interrupt Sources · Programmable Serial UART Channel · Direct LED Drive Outputs · On-Chip Analog Comparator · Low Power Idle and Power Down Modes Description The AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with 2K Bytes of Flash programmable and erasable read only memory.

eatures ·兼容MCS - 51的产品·及2k字节的编程快闪记忆体-耐力： 1 000写/擦除周期·在2.7 V至6 V的操作范围·完全静态的运作： 0 Hz至24兆赫·两个层次的程式记忆体锁· 128 × 8位内部RAM · 15个可编程I / O线·两个16位定时器/计数器· 6中断源·可编程串行UART的频道·直接驱动LED产出·单晶片模拟比较·低功耗的闲置和掉电模式描述该AT89C2051的是一个低电压，高性能的CMOS 8位微机与及2k字节的Flash可编程和可擦除唯读记忆体。

The Memory Program: How To Prevent Memory Loss And Enhance Memory Power by D.P.

记忆节目：如何防止存储的损失，增强记忆力恰托帕

In a pipelined processor, a pre-decoder in advance of an instruction cache calculates the branch target address of PC-relative and absolute address branch instructions.

在流水线式处理器中，位于指令高速缓存之前的预解码器计算PC-相对和绝对地址转移指令的转移目标地址。

Digital video processing ; FPGA ; address mapping ; cache operating

数字视频处理； FPGA ；地址映射；缓存操作

A method and system for preventing address resolution protocol cache poisoning in a network system with multiple hosts.

一种用于在具有多个主机的网络系统中防止地址解析协议高速缓存中毒的方法和系统。

This store is known as the Address Resolution Protocol cache.

ARP是把IP地址映射到MAC地址的通用工具。

Use the NetShell command to clear, delete or refresh the Address Resolution Protocol cache by following the following steps.

使用的NetShell命令来清除，删除或刷新地址解析协议缓存按照下列步骤。