查询词典 flop

bistable multivibrator：双稳态多谐振荡器

学名"双稳态多谐振荡器(Bistable Multivibrator)". 触发器(Flip Flop)是一种可以存储电路状态的电子元件. 最简单的是由两个或非门,两个输入端和两个输出端组成的RS触发器(见图). 复杂一些的有带时钟(CLK)段和D(Data)端,在CLK端为高电平时跟随D端状态,

bistable multivibrator,flip flop：双稳多谐振动器

"双安定元件","bistable device" | "双稳多谐振动器","bistable multivibrator,flip flop" | "位元,比","bit"

the whole kit and caboodle：全部都齐,全部一起

no shakespeare/be not shakespeare 我不太会表达i am no shakespeare | the whole kit and caboodle 全部都齐,全部一起 | flop 票房惨败的电影

clock pulse：时钟脉冲

■其他之IC[正反器(Flip-Flop)]每当输入一时钟脉冲(Clock pulse),输出端之状态将随其变化之IC. 正反器可分为T型正反器;D型正反器等多种,其详细动作将在后面介绍. [计数器(Counter)]计算器或计时器中所必须使用之IC之一. 其基本之电路为正反器,

clocking：同步

clocked flip flop 时标触发器定时触发器 | clocking 同步 | clone 兼容产品

Close-packed structure：密堆积结构

Clock flip-flop 时钟触发器 | Close-packed structure 密堆积结构 | Close-loop gain 闭环增益

delayed coagulant：缓凝剂

delayed channel amplifier 延迟信道放大器 | delayed coagulant 缓凝剂 | delayed flip-flop 延迟触发器

combinational logic：组合逻辑

两者除了闸数的差异,在结构上也有差异:CPLD采连续式布线结构,较适合用来实现各种运算和组合逻辑(combinational logic),也就是触发器(flip-flop)有限而乘积项(product term)较多的结构;FPGA采用分段式布线结构,适用於实现循序逻辑(sequential logic),

compiler compiler：衍生编译程式

"compiler routine","编译常规,编译常式" | "compiler-compiler","衍生编译程式" | "complement flip flop","互补正反器"

one's complementer：(二进制)反码制

one-person game tree 单人博弈树 | one's complementer (二进制)反码制 | one-shot flip-flop 单稳触发器

Get a handle on this lady, will ya：拜托你管管这位小姐

- Come here. - Where's my daughter?|放手 我女儿呢? | Get a handle on this lady, will ya?|拜托你管管这位小姐 | Is that the lady with the kid?|那就是带了小孩的女人吗?

Molecularly imprinted polymer：传感器

分散聚合:magnetic polymer microspheres | 传感器:Molecularly imprinted polymer | 电子聚合物:electronic polymer