存储器的存取时间

The resulting system 1 maintains or improves CPU utilization rates as CPU speeds increase, 2 provides large level 1 caches while maintaining cache access times of one CPU clock cycle, and 3 provides high CPU utilization rates for those processing applications where locality of memory references is poor (e.g., networking applications).

随着CPU速度的提高，能够保持或提高CPU的利用率，2）提供大容量一级高速缓存，并同时保持高速缓存的存取时间为一个CPU时钟周期，3）为那些存储器引用局部性不强的处理系统提供高的CPU利用率。

The controller uses the data write buffer to reduce the data access waiting time, and employs the two ways of duo channels instruction pre-fetch buffer to decrease the fetching instruction waiting time and increase the instruction pre-fetch buffer hit rate. Meanwhile, to reduce the waiting time aroused by page miss of SDRAM, a four ways of on chip stack memory is introduced. Compared with traditional controller through experiments the novel SDRAM controller gets a high reduction up to 63% in access waiting time and 64% in page miss.

该控制器采用数据写缓存方式降低了数据在存取内存时的等待时间；并引入了两组双通道预取指令缓冲器，每组双通道都用以减少取指令时的等待时间，采用两组的结构是为了增加指令预取的命中率；同时还使用了四路组关联的片上堆栈存储器来降低SDRAM的页失效频率，从而降低了因页失效而需要等待的时钟周期。

If you are unfortunate enough to the lovelorn, please tell me, I will help you out, really, please contact me!

如果你不幸失恋了，请告诉我，我会帮助你摆脱困境，真的，请联系我啦！

China's plan to cut energy intensity by 20 percent and pollutant discharges by 10 percent between 2006 and 2010 is a case in point.

中国计划在2006年到2010间降低20%的能源强度和减少10%的主要污染物排放，就是一个这样的例子。