查询词典 puff adder

Based on a new modified Wallace multiplier structure, named bi-forked Wallace multiplier structure, this paper presents the design of a highly re-configurable Multiplier for VLIW multimedia-processor. We found a reusable design method to extend multiplier with full adder array. The Structure can enable 32/16/8 bit operands, and has been optimized for speed and area.

在VLIW多媒体芯片的设计过程中，针对传统乘法器与加法器的不足，提出了一种新的分叉华莱氏树结构的乘法器模型，采用可重用的模块化设计思想，通过重用一位全加器阵列对乘法器进行扩展，处理器可以在一个乘法器单元内部同时支持多个32/16/8位的乘法运算，同时使乘法单元的速度和面积均得以优化。

In part one (chapter 2-3), two new methods and systems of optical parallel logic operation are studied. Triple-in Double-out shadow-casting logic operation system is proposed and realized for the first time. Based on this, optical full adder and 3-bit decoder array logic have been obtained. It is the first time to use coding pattern and different reading-writing model to realize BSO-PROM optical parallel logic operation where the time-order operation is avoided, so that the computing speed of optical parallel logic gate which uses this kind of spatial light modulator is increased, and it is successfully used in optical symbolic substitution .

在第一部分，对两种新的并行光学布尔逻辑运算方法及系统进行了研究：首次提出并实现了三输入、双输出铸影光学逻辑运算系统及其由此得到的光学全加器，并提出一种以此为基础的3-比特译码器阵列逻辑，首次利用图形编码和不同的读写模式实现了无时序操作的BSO-PROM光并行逻辑运算，大大提高了这种空间光调制器用作光并行逻辑门的运算速度，使之成功地用于光学符号代换之中。

According to the requirements for alternating current sampling, four feasible schemes (full-wave rectification, double 4051, raised analog ground and adder technique) are systematically contrasted in this dissertation. The hardware and software of this instrument are also analyzed in great detail.

本文围绕交流直接采样的技术要求，详细地对比分析了四种可行性设计方案，其中包括全波整流、双4051、模拟地抬高及加法器方式，并对其硬件实现和软件编程进行了详细的分析与论证。

It analysed the principle of Reed-Solomon encode, the design of basic unit circuit, including Galois field adder and multiplier, and addressed the application method of parallel multiplier with constant coefficients under the natural base.

分析了RS码的编码原理，基本单元电路设计，包括有限域加法器和乘法器，并着重阐述了自然基下常系数并行来法器的实现方法。

As the bastard great-grandson Edmund Blackadder of the original Black Adder.

作为第一季黑爵士的伟大的孙子，私生子爱德蒙黑蝰蛇爵士。

A real time optical logic processor is presented, that can perform binary logic operations in parallel. Experimental result is given of the system as a half adder.

本文提出了一种能实时完成二进制逻辑运算的光学并行处理系统，并给出了作为半加法器的实验结果。

Based on ZDFV work, the thesis focuses on the following key problems: how to construct an efficient synthesis engine; how to improve the structural similarity of the two designs; how to verify data path designs efficiently; how to use half adder graph to perform arithmetic unit verification; and how to use the hybrid SAT engine in the existing verification flow.

为了解决这个问题，本文作者结合自主研发等价性验证系统的工作，在高效综合引擎的研究与实现、单个模块的相似性研究、数据通路的验证方法、结合半加图的算术单元验证以及基于混合SAT引擎的RTL验证流程等五个方面开展了研究：1。

The optimal operating speed without considering the response time of the nonlinear material, the least ON to OFF logic-level contrast ratio, and the minimum power for this half adder obtained were 0.91Tbps, 16dB and 436mW, respectively.

研究表明，当忽略介质本身与光场作用的时间延迟时，该半加器优化后的运算速度为0.91 Tbps，最小消光比为16 dB，最小消耗功率为436 mW。

Unlike BDD, BMD adds weight on edges and thus reduces the node quantity of the diagram. A new circuit abstraction method, half adder graph was proposed to represent arithmetic circuits during the synthesis period.

结合半加图的算术单元验证：论文研究了基于BMD验证乘法电路的方法，该方法使用矩分解方式，在BMD的边和节点上赋予权重信息，减少了图的节点数。

An all-optical half adder based on two different cross structures in two-dimensional photonic crystals was proposed. One cross structure contains nonlinear materials and functions as an "AND" logic gate.

提出了基于两种二维光子晶体"十字"逻辑门的全光半加器，其中一种"十字"结构含有非线性介质，起"与"作用，另一"十字"结构不含非线性介质，起"异或"作用。

If you were not , and OS X just booted normally, have no fear.

如果你没有，和OS X刚刚启动通常，没有恐惧。

I only want to preserve our all .

我只想保存好我们的一切