查询词典 protected mode

When condensers with carbon steel waterbox and titanium tube structure were protected by SACP in an ocean beach power plant,while seawater were used to be cooling water,carbon steel was under-protected and Titanium was over-protected,because their protective potential are less than-0.85Vvs.

滨海电厂常以天然海水作冷却水，其碳钢水室和钛管凝汽器在实施阴极保护过程中，要求钢电位应低于-0.85Vvs。

The program can work in DOS mode changes from real mode to protected mode.

该程序可以将DOS的工作模式进行转变，由实模式进入保护模式。

Virtual 8086 mode is a sub-mode of protected mode.

虚拟V8086模式是一种特殊的保护模式。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

RT9173BPS Pinout: SE: 1 W to 25 W, BTL: 4 W to 50 W operation possibility (2.1 system) Soft clipping Standby and mute mode No on/off switching plops Low standby current High supply voltage ripple rejection Outputs short-circuit protected to ground, supply and across the load Thermally protected Pin compatible with TDA8944AJ and TDA8946AJ.

RT9173BPS引脚说明：东南：1瓦至25瓦，桥式连接：4 W到50瓦行动的可能性（2.1系统）软剪辑没有对待机和静音模式/关低待机电流高电压纹波抑制输出短路保护，接地，电源砰地一声撂下和全国保护引脚热负荷与TDA8944AJ和TDA8946AJ兼容。

Chaper 3 compares and analyzes four modes of financing of enterprise in the world, include securities business leading mode in America, main bank mode in Japan, almightiness bank mode in German, government leading mode in Korea.

第三章比较、分析国际上具有代表性的四种企业融资模式，即美国证券市场主导型、日本主银行主导型、德国全能银行主导型和韩国政府主导型企业融资模式。

On the basis of the above results of detecting methods, the instruction signal calculating circuit is designed according to i〓, i〓 calculating mode. Compensation current generating circuit is also designed and implemented. Its current following circuit is designed according to the instantaneous value comparing mode that used constant time control. The source current detection based control mode and composite control mode and their implementation are firstly introduced in our country. The method and the principle of dc side capacitor voltage control are explained clearly.

根据检测方法的研究成果，采用i〓、i〓运算方式构成并联型电力有源滤波器的指令电流运算电路；对补偿电流发生电路进行了电路设计和实施，其中电流跟踪控制电路采用电流跟随性能好、可靠性高的定时控制瞬时值比较方式；在国内首次研究并实施检测电源电流控制方式和复合控制方式；清楚地阐明了并联型电力有源滤波器直流侧电压控制的原理和方法，并在装置中实施。

take yangling national agricultural high-tech zone as the research base, by analyzing 37 agricultural high-tech enterprises in shaanxi, this paper summarizes the four modes of agricultural high-tech enterprises in china: derivative mode, central mode, cooperative mode and commission mode.

以杨凌国家农业高新技术产业示范区作为研究基地，通过对示范区内37家农业高新技术企业的调查分析，归纳总结出我国农业高新技术企业技术创新的四种模式：衍生型、中心型、合作型和委托型。

Constant Angular Velocity mode and Constant Linear Velocity mode are integrated to build a single spindle motor control module to incorporate with long-seek servo. CAV mode and CLV mode are performed to show its feasibility. The experiment results showed that the pick-up-head can perform arbitrarily track-jump command, quite well.

此外，在主轴马达伺服部分，提出以跨轨旗标讯号来决定使用『碰-碰』控制法则让主轴马达转速变化的执行时间，也将主轴马达伺服中的等角速度控制模组与等线速度控制模组整合成功，形成单一的主轴马达控制模组，使与长寻轨伺服结合而更易於操作，让不论内、外寻轨的任意跨轨命令皆可以达成定线速度或是等角速度的控制目标。

In the chapter 2, the theoretic knowledge about the photosensitive resin and the grinding tools was firstly introduced.

第二章阐述了光固化树脂结合剂磨具的相关理论研究。

Do not use the program's indenting or margin-setting features; these will be added during typesetting.

不要使用缩排，页面边缘设置之类的选项，偶看不大懂。