查询词典 grouped sample unit

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

The instrument simultaneously sample for three phase voltage and current. Rotary photoelectric coding switch and LCD are used for human-computer interaction. it makes the interface compact and efficient. Utilizing the function of positive and negative edge trigger of the programmable counter array unit in MPU, signal zero-cross is captured for the phase detected based on double way. The software synchronism sampling method based on real-time parameter self-optimizing minishes period truncation error, and the measurement accuracy is improved. The digitization power measure imports traditional two-unit and three-unit methods and expands application range of the instrument. The capacity is discriminated by soft ware table-look-up on the load loss. The value of a quantity is converted to the value when reference temperature (75 ℃) from test temperature.

该仪器具有以下特点：仪器对三相电压电流同时采样；基于旋转式光电编码器和液晶显示屏的人机交互界面简洁而高效；可编程计数器阵列PCA"捕获"信号的过零点用于双向过零平均鉴相，得到准确的相位差和周期；基于实时参数自寻优的软件同步采样，有效地减小了周期截断误差，提高了测量准确度；数字化功率测量引入了传统的二表法和三表法，扩展了仪器的使用范围；实际容量根据负载损耗用软件查表的方法来判别；测量值已从试验温度折算到了参考温度(75℃)时的值。

The hot-plug power system comprises a backplate equipped with a power supply which is in plugging connection with the backplate, a management module of a detecting unit and an enabling unit and a service module in plugging connection with the backplate; the detecting unit is used to detect whether the service module is stably plugged into the backplate, and if yes, the enabling unit outputs a valid enabling signal to the service module and order the service module to be powered.

热插上电系统包括设置有电源的背板、与背板接插连接，包括检测单元和使能单元的管理模块、和与背板接插连接的业务模块；检测单元用于检测业务模块是否稳定插入背板，当背板稳定插入背板时，使能单元输出有效的使能信号至业务模块，指示业务模块上电。

Hardware included main unit, data gathering unit, output control unit and communication unit.

硬件部分包括主控单元、数据采集单元、输出控制和通讯接口。

The invention discloses a MicroTCA system, which comprises an MCH, and a clock card and a plurality of AMC cards connected with the MCH, wherein the clock card includes a clock selection unit for selecting a clock source and outputting, and a phase locking unit for generating a system synchronous clock from the clock source selected by the clock selection unit of the clock card; and the MCH includes a clock drive unit for driving the system synchronous clock generated by the clock card to the plurality of AMC cards connected with the MCH.

本发明公开了一种MicroTCA系统，包括：MCH、与所述MCH连接的时钟卡及多个AMC卡，其中，所述时钟卡包括：时钟选择单元，用于选择时钟源并输出；锁相单元，用于将所述时钟卡的时钟选择单元所选择的时钟源生成系统同步时钟；所述MCH包括：时钟驱动单元，用于将时钟卡所产生的系统同步时钟驱动到与所述MCH相连的多个AMC卡。

The results were as follows, the total cultivated area of Liaoning province has declining tendency in recent 26 years, the total grain yield and the grain yield per unit area increased in "wave" style; the grain yield per unit area and total planting area had the great effect on total grain yield, and the effect of yield per unit area on total grain yield is bigger than that of planting areas; the yield and the planting area of different crops also affected total grain yield greatly, and maize, rice, durra, wheat affect the total grain yield by grain yield per unit area, while millet, maize, wheat affect the total grain yield through planting area changing.

得出如下结论，辽宁省近26年粮食总播种面积呈下降趋势，粮食总产量和平均单产受气候条件影响呈波动式增加；粮食总播种面积和平均单产均显著影响着粮食总产量的变化，并且粮食平均单产的变化对总产的影响要大于粮食播种面积的影响；各种作物的产量和播种面积变化都影响粮食总产量的变化，但各种作物对粮食总产量影响的方式不同，其中玉米、水稻、高粱和小麦主要是通过单产的变化影响粮食总产量，谷子、玉米和小麦则是通过播种面积的改变来影响粮食总产量的变化。

The concept of G unit interval and the definition of separable degree between elements on G unit interval are given, and some properties are discussed. Based on this concept, it determined a metric p, and ([0, 1], p) becomes a metric space (It is called G unit logical metric space). In this paper, the properties and structure of G unit logical metric space are discussed in detail, and get some good results.

给出了G单位区间[0， 1]的定义并在其上引入了元素间的可分度的概念，讨论了其基本性质，并在此定义的基础上确定了一个度量P，从而([0， 1]， p)成为一个度量空间（文中称"G单位逻辑度量空间"），并对G单位逻辑度量空间的性质及其结构进行了详尽的讨论，并得到一些好的结果。

On the product of unit spheres,we give a kind of natural embeddings from the product unit spheres to the unit sphere in which the product of unit spheres can be viewed as a hypersurface.

第一个是在乘积单位球面上，我们给出自然的由乘积单位球面到高一维球面的嵌入映射，然后考虑了在乘积单位球面上预给定Gauss-Kronecker曲率后，我们所考虑的嵌入的存在性。

Secondly, we discuss generalizedderivable mappings at unit and Jordan derivable mappings at unit on Von Neumannalgebra, and we prove that every norm continuous linear mapping generalized deriv- able at unit is a generalized inner derivation, every norm continuous linear mappingJordan derivable at unit is a inner derivation.

其次对Von Neumann代数M上的在单位广义可导和在单位Jordan可导的线性咉射进行了讨论，证明了在单位广义可导的范数连续的线性映射是M上的广义内导子，在单位Jordan可导的范数连续的线性映射是M上的内导子。

I'm not an actor. I'm a professor of paleontology.

我不是演员，我是古生物学教授

Spider Network Web site that is a very image of the name.

网络蜘蛛即Web Spider，是一个非常形象的名字。