查询词典 clock

A controller generates a first clock signal CLK and a second clock signal iclk for the first and second devices.

控制器(310)为第一和第二设备(120、130)产生第一时钟信号CLK和第二时钟信号iclk。

In Figure 2-2, notice the top symbol, CLK. This is the computer system clock; the microprocessor uses the system clock to synchronize its operations.

在图2-2中，注意最上面的符号CLK，它是计算机的系统时钟，微处理器用系统时钟使其操作同步。

1 Sequence of the system clock,One clock cycle later,to allow time for memory

一个时钟周期（允许存储器对地址译码和访问数据的时间）之后

A delayed clock pulse is generated a predetermined amount of time after each assertion of the deserialization clock.

在发出每一个解串时钟后的预定的时间量之后，产生延迟的时钟脉冲。

When Ss is low n, this sensor predicts 16 clock pulse is in serial clock line.

当ss为低电平的时辰，该传感器估量16个时钟脉冲在串行时钟线。

According to the demand of controlling speed, the system give out corresponding clock pulse to control the speed of the motor through the clock pulse.

控制系统按速度控制的要求从时钟脉冲控制线发出相应的控制脉冲即可对步进电机的转速进行控制。

Plus clock, time to speed up; by the clock pulse, time slows down.

加时钟脉冲，时间加快；减时钟脉冲，时间减慢。

To this end, the telecommunications systems receive the clock pulse and an additional piece of information from the received data stream, said piece of information describing the quality of the clock signal.

在此，电信系统接收时钟，并从所接收的数据流中接收说明该时钟信号的品质的附加信息。

Because each clock cycle has both a high and a low state, after the first clock pulse, two LEDs will always be on—that is, LED 1, LED 1 and 2, LED 2 and 3, LED 3 and 4, and so on.

因为每个时钟周期都是高低电平状态，第一个时钟脉冲后，两个LED通常是亮的——也就是说，LED1，LED1和2，LED2和3，LED3和4，等等。

In addition to the MP3 functionality, this jacket also FM radio, alarm clock, clock, timer functions.

除了MP3功能，这件夹克还有FM 收音机、闹钟、时钟、计时器等功能。

Go to your desktop and right click in a blank space.

请到您的桌面，然后右击一个空白。

Tara appears in Buddhism, Jainism, and particularly, Tibetan Lamaism, as a complex array of manifestations: goddess of ascetism and mysticism, mother creator, protectress of all humans as they cross the sea of life.

度母出现在佛教，耆那教里面，尤其是西藏的喇嘛教，作为一系列的陈列阵容；神秘的女神，创世之母，人类横过生命之海洋的女性保护者。