查询词典 chip budding

To connect a capillary with an electrophoresis chip, a dead volume was usually created due to a hole with a conical-shaped bottom formed by drilling into the edge of the chip after the capillary was inserted into the hole.

为了丰富电泳芯片的功能及扩大其应用范围，芯片与外界的液体连接问题现在正成为一个新的研究热点[1～4]，芯片与传统的毛细管电泳检测器的连接是其中一个主要的研究方向[1～3]。

In this paper, a new kind of head structure and motion mechanism were developed by integrating synthetically a crank-rocker mechanism and a head face eccenter mechanism, that realize the operating functions of LED chip die bonders to drive chip of, such as picking up, carrying and bonding.

为实现LED芯片键合机对芯片的高速高精确地拾取、传送和粘贴等功能，本文综合运用曲柄摇杆机构和偏心轮机构开发了一种新型焊头结构与运动机构。

CEAS helps the adoption of ChIP-chip in mammalian systems and provides insights towards a more comprehensive understanding of transcriptional regulatory mechanisms.

CEAS帮助在哺乳动物系统中采用ChIP-chip并提供了对转录调控机制的一个更全面的理解。

Biologists can utilize CEAS to retrieve useful information for ChIP-chip validation, assemble important knowledge to include in their publication and generate novel hypotheses (e.g. transcription factor cooperative partner) for further study.

生物学家可以利用CEAS为ChIP-chip确认检索有用的信息，收集重要的信息以包含在它们的刊物中并产生新的假设以进行进一步研究。

In 1989, we familiar to ear 80486 chipses be released by the INTEL, the great place of this kind of chip lies in the boundary that it broke 1,000,000 transistors actually, integrating 1,200,000 transistors.80486 clock frequencies raise a 33 MHzs, 50 MHzs gradually from the 25 MHzs.80486 is 80386 help processor with mathematics,80387 and 1 high speed of 8 KBses saves an integration slowly in a chip, and in the 80 X86 the serieses for the very first time adopted a RISC technique, can carry out an instruction in a clock period.

1989年，我们大家耳熟能详的80486芯片由INTEL推出，这种芯片的伟大之处就在于它实破了100万个晶体管的界限，集成了120万个晶体管。80486的时钟频率从25MHz逐步提高到33MHz、50MHz.80486是将80386和数学协处理器80387以及一个8KB的高速缓存集成在一个芯片内，并且在80X86系列中首次采用了RISC技术，可以在一个时钟周期内执行一条指令。

To ease the analysis of the large amounts of data generated by this approach, we have developed CoCAS, a standalone software suite which implements optimised ChIP-on-chip data normalisation, improved peak detection, as well as quality control reports.

为了减轻由这个方式产生的大量数据的分析，我们开发了CoCAS，一个独立的软件套件，可以执行优化的ChIP-on-chip数据归一化，提高peak发现，并进行质控报告。

The output is high impedance when the both the Flash chip and the SRAM chip are deselected or the outputs are disabled and when Reset is at a V IL.

输出为高阻抗时，无论是闪存芯片和SRAM芯片是取消选择或输出被禁用时复位在一个V IL是。

This paper discusses in detail,from the selection of single chip computer to application system test,the problems in single chip computer system anti-interference design ,and presents with the help of diagraphs some design methods,which are summarized by the author in his teaching,and easy to learn.

文章以系统设计的角度，从单片机的选择到应用系统的测试，全面描述了单片机系统抗干扰设计中需关注的一些问题，并且展现出具体的方法措施。

The possibility of researching gene mutation with the technique of gene chip was discussed. A new imagination to randomly determine DNA sequence in different living beings with the technique of gene chip was advanced. In this way, whether the encoding sequence gene in DNA of eukaryon organism has some regularity was studied.

进而提出新设想——采用基因芯片技术对不同生物群体随机抽样进行DNA测序，从而探讨在真核生物DNA分子链上编码序列遗传基因的变化是否有规则而非随机的，非编码序列遗传基因是否为生物进化过程中曾经有表达能力的结构基因，并分析可能获得的结果。

Pinout: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Little-endian C Embedded ICE (In-circuit Emulation) 8-, 16- and 32-bit Read and Write Support 256K Bytes of On-chip SRAM C 32-bit Data Bus C Single-clock Cycle Access Fully Programmable External Bus Interface C Maximum External Address Space of 64M Bytes C Up to Eight Chip Selects C Software Programmable 8/16-bit External Data Bus Eight-level Priority, Individually Maskable, Vectored Interrupt Controller C Four External Interrupts, including a High-priority, Low-latency Interrupt Request 32 Programmable I/O Lines Three-channel 16-bit Timer/Counter C Three External Clock Inputs C Two Multi-purpose I/O Pins per Channel Two USARTs C Two Dedicated Peripheral Data Controller Channels per USART Programmable Watchdog Timer Advanced Power-saving Features C CPU and Peripheral Can be Deactivated Individually Fully Static Operation: C 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85C 2.7V to 3.6V I/O Operating Range 1.65V to 1.95V Core Operating Range -40C to +85C Temperature Range Available in 100-lead TQFP Package

M5L8253P-5引脚说明： C型高性能32位RISC架构C高密度以MIPS /瓦C小端C十六位指令集C领袖嵌入式冰8 - 16 -位和32位的读写支持256K的片上SRAM的 32位数据总线C单时钟周期存取字节完全可编程的外部总线接口C最大的外部地址空间的64M字节多达8个C芯片选择C软件可编程8位外部数据总线8级优先级，独立可屏蔽，向量中断控制器C四外部中断，其中包括一个高优先级，低延迟中断要求32个可编程I / O口线三通道16位定时器/计数器C三个外部时钟输入C两多用途I / O引脚每通道2个通用同步C两专用外设数据控制器通道每个USART可编程看门狗定时器先进的节能特性 CPU和外设可停用独立全静态工作中：C 0 Hz至75 MHz的频率范围内的VDDCORE = 1.8，85℃2.7V到3.6VI / O的操作1.65V到1.95V范围核心工作电压范围在- 40C至+85 C温度范围内使用的100引脚TQFP封装

He's a pretty westernised kind of guy.

他是一个非常西化的人。

National spirit is the moral kingpin for a nation to realize common ideal and goal.

一、中华民族精神的基本内涵党的十六大报告指出：在五千多年的发展中，中华民族形成了以爱国主义为核心的团结统一、爱好和平、勤劳勇敢、自强不息的伟大民族精神。