查询词典 buffer circuit

To this end, the use of MCS-51 series AT89C51 single-chip device designed as the central traffic light control circuit, with a total of cathode seventh time the digital display module, the traffic light display module, transfer module, crystal oscillator circuit, reset circuit and control circuit 8051 in accordance with the actual traffic flow through the port P3 chip set red, green and double-time to kindle a digital countdown display,The turn of the three colors of lights and emergency lighting in case of interruption of processing.

为此，采用MCS-51系列单片机AT89C51为中心器件来设计交通灯控制电路，配以七段共阴极数码管显示时间的显示模块，交通灯显示模块，调时模块，晶振电路，复位电路以及控制电路，实现根据实际车流量通过8051芯片的P3口设置红、绿灯燃亮时间以及双位数码管显示倒计时，三种颜色灯交替点亮以及紧急情况下的中断处理功能。

One high-speed buffer circuit is added to the volume potentiometer to eliminate its influence on frequency bandwidth of the bridge circuit.

1，在音量电位器后增加一级高速缓冲电路，杜绝由于音量电位器对后级电路的频率带宽影响，音量控制方式使用并联型，有效提升音质，也降低了对电位器的要求，降低成本。

A hysteresis adding circuit (75) is coupled to the at least one output of the buffer circuit.

磁滞添加电路(75)连接到缓冲电路的所述至少一个输出端。

A circuit comprises a first (6) and a second (21) input for receiving a differential signal and a buffer circuit.

一种电路包括用于接收差分信号的第一(6)和第二(21)输入端及缓冲电路。

Input buffer isolates this stage circuit and next stage circuit.

缓冲级起到了该级电路与前级电路的缓冲、隔离作用。

The invention also permits an extremely simple construction of the RF parts of the mixer circuit on a microstrip substrate, on which the buffer 25 and cancellation circuit 4 to 9 may also be formed and mounted in a very small and compact arrangement.

该发明还允许一个极其简单的RF部分混合器微带电路基板上，而在缓冲电路25日和取消5月4号至9号也将形成和安装在一个非常小的，紧凑的安排。

The collectivity frame of testing system is described in the paper, then, the double data buffer circuit matching the data storage characteristic of FLASH memory and the center control circuit for completing data read-in, enumerating and erasure etc. are designed At last, the software flow of testing system is given as well.

论述了测试系统总体设计思想；设计了与FLASH存储器的数据存储特点相匹配的数据双缓冲电路，以及对FLASH存储器的数据进行写入、读出、擦除等操作的中心控制电路；并且设计了测试系统实现所有功能的软件流程。

According to the model, circuits are designed, which include the circuit of two kinds of pixel, column output circuit, output buffer and decoder that is used to select row and column.

接着再利用n+-psub型二极管的模型设计图像传感器的电路，包括两种像素电路，列输出电路，单位增益缓冲器，以及用于行列选择的译码器。

This block includes the following circuits: the pulse swallow circuit and data sampling circuit, a lead-lag phase detector, a loop filter, a clock multiplexer and an elastic buffer.

整个数据恢复电路包括以下模块：脉冲吸收与数据采样电路，超前滞后鉴相器，环路滤波电路，时钟选通电路以及弹性缓存。

Integrated 10BASE-T/100BASE-TX/1000BASE-T transceivers · 10/100/1000 tri-speed MAC · Host interfaces - PCI v2.2, 32/64-bit, 33/66-MHz - PCI-X v1.0, 64-bit, 133-MHz · MII/GMII/TBI interfaces for external transceivers · Ultra-deep, 96-KB on-chip packet buffer · Dual high-speed RISC cores with 16-KB caches - Programmable, in-line packet classification · SMBus controller · On-chip power circuit controller and Wake on LAN power switching circuit

集成号10Base-T/100Base-TX/1000Base-T收发器·10/100/1000三速陆委会·主机接口- 2.2版的PCI，32/64，33/66-MHz -的PCI - X的1.0版，64位，外部收发器133兆赫·信息产业部/的GMII / TBI的接口·超深，96 KB的片上分组缓冲·具有16 KB的缓存双高速的RISC核心-可编程，在线数据包分类·SMBus控制器·片上电源电路控制器和网络唤醒电源开关电路

"Second Life is remarkably easy to work with, and is very popular,"

"第二次生命是显着容易的工作，并且很受欢迎，"

For example, we usually assume that materials are homogeneous and isotropic and free of internal defects or flaws.

为了得到适合有限元分析的模型，我们必须经过如图2所示的简化步骤。