查询词典 sample and hold circuit

In front of the A/D converter in an analog conversion system is usually located a sample-and-hold circuit.

在模拟量转换系统中在模/数转换器的前端通常都会有一个采样-保持电路。

A low supply voltage sample-and-hold circuit for a pipelined analog-to-digital converter is described.

设计了一个用于流水线型模数转换器的低压采样保持电路。

On the basis of analyzing the common methods of background magnetic field compensation,a new automatic compensation method based on sample and hold circuit is put forward.

在分析磁通门常用背景磁场补偿方法基础上，提出一种新的采样保持电路自动补偿方法。

A high performance CMOS sample and hold circuit for use in the front end of a l2bit 100MS/s ADC is presented.

介绍了一种用于12bit，100MS/s流水线模数转换器前端的采样／保持电路的设计。

Sample and hold circuit ; fluxgate ; background magnetic ; geomagnetic field ; compensation

采样保持电路；磁通门；背景磁场；地磁场；补偿

Analog part includes sample and hold circuit, current comparator and digital analog convert.

类比部份为：取样保持电路、电流比较器、数位类比转换器。

In the system, a finepositioning window signal generating circuit redundant, sample and hold circuit of positioning error signal using no traditional charge/discharge method but high-speed switches and operational amplifier integrators, and cross-zero detector with threshold for higher reliability, is originated by the author in this paper.

综合面伺服和扇区伺服的各自优点，设计完成了4000 TPI光刻伺服解调系统：在设计中，首创了带冗余的精定位窗口信号生成电路，采用高速模拟开关和运放积分电路代替传统的电容充放电法，以完成精定位位置误差信号的平均与采样保持，使用带阈值的过零检测电路提高过道脉冲的可靠性。

With the gain-boost technology,the operational transconductance amplifier used in this analog-to-digital converter achieves enough DC gain and unity-gain frequency under the low voltage supply and to guarantee the performance of the sample and hold circuit and the sub-stages.

同时利用增益增强技术设计高直流增益和高单位增益带宽的运放，从而保证采样保持电路和子级电路的性能。

In formal we adopt 1.5-bit/per stage technology and a 2-bit flash ADC in the last stage. We adopt switch-capacitor circuit to design the sample and hold circuit and the multiplying DAC.

本次设计为九阶段的管线式类比数位转换器，前八个阶段采用1.5-bit/per stage的技术，最后一个阶段则为一个2-bit的快闪式类比数位转换器。

Considering the speed , power dissipation and specifications, A flip-around sample and hold circuit was designed to reduce the power consumption; S/H circuit is followed by eight 1.5-bit stages and a final 2-bit flash sub-ADC.

该流水线式ADC的采样保持电路采用Flip-around结构以减少功耗；前8级每级1.5位，最后一级为2位的并行flash ADC，并采用数字校正技术对级电路的误差进行校正，最终以达到10位的精度；为了达到系统低功耗的要求，该流水线ADC采用了运放共享技术和逐级缩小技术。

Objective To investigate the effects of interleukin-1 β converting enzyme gene on the biologic characteristics of ovarian cancer cells.

目的 探讨白细胞介素-1 β转换酶的表达，对卵巢癌细胞生物学特性的影响。

Campylobacter: This illness is the most commonly identified cause of diarrheal illness in the world.

弯曲：这种病是最常见的原因查明腹泻病，在世界上。