查询词典 core

To optimize the design of core-box and to improve the quality of sand core, it is necessary and important to simulate the core-shooting process with numerical method.

为了优化芯盒设计、提高砂芯质量，利用计算机数值模拟技术来模拟射砂过程就显得具有重要的工程实用价值和理论意义。

2 Core and changing the no-bake sand core to oil sand core .

通过重新设计2#芯子的工艺，将原来的自硬砂芯改为油砂芯，节约了芯子成本。

In view of the fact that the honeycomb cardboards even pressure performance is mainly by the paper core decision and the performance, through to the honeycomb cardboard even pressure performances test analysis core papers gram again to the honeycomb cardboards even pressure performances influence, after as well as the different gram heavy honeycomb cardboard double-decked superimpositions even pressure performance analysis, discovered that each different gram heavy paper core the honeycomb cardboard experiences the elastoplasticity, the plasticity and the compaction in the process of packing distorts various stages; The even pressure intensity heavy increases along with the gram increases, and heavy increases the even pressure intensity along with the gram to increase is more obvious.

鉴于蜂窝纸板的平压性能主要是由纸芯决定和表现的，通过对蜂窝纸板平压性能的测试分析芯纸的克重对蜂窝纸板的平压性能的影响，以及不同克重蜂窝纸板双层叠加后的平压性能分析，发现各个不同克重纸芯的蜂窝纸板在压缩过程中都经历弹塑性、塑性和压实变形各阶段；平压强度随克重的增大而增大，并且随克重的增大平压强度增大更为明显。

The paper focuses on the load distribution and load transfer among soil, pile-core and pile-socket, the interactive behavior of cement-soil ring and reinforced concrete core and some corresponding factors influencing the displacement of the pile which include the various core length, the section radius, the elastic modulus of soil and cement–soil etc.

着重分析了砼芯水泥土搅拌桩的竖向荷载在桩身内外芯和桩土各部分间的分配，砼内芯桩与水泥土外芯桩在荷载传递过程中的相互作用和共同工作特性，以及影响单桩沉降的因素包括砼内芯的直径和长度、水泥土和桩周土体的弹性模量等。

The article starts with the basic conception of urban feature, makes contrast analysis with relevant fields of urban landscape, urban ecology, urban geography, urban aesthesis, clarifies the study subject and field of urban feature, relates the study with the specialty of urban feature study contents, and based on the probe of urban feature's characteristics of obscurity, certainty and duality of culture and form, puts forward with systematic analysis the conceptions of urban feature hiding factor, urban feature surfacing factor, urban feature core, urban feature mark, space structure core and times core, and sets up urban feature database.

论文首先从城市风貌的基本概念出发，通过与城市景观、城市生态、城市地理、城市美学等相关学科的对比分析，明确了城市风貌研究的对象和范畴，结合城市风貌研究内容的特殊性，在深入剖析了城市风貌的模糊性、确定性、文态与形态双重性等特征之后，运用系统分析的观点，提出了城市风貌潜态因子、城市风貌显态因子、城市风貌核、城市风貌符号、空间结构核、时间文态核等概念，在系统分析的基础上，建立了城市风貌信息数据库。

Based on the previous experiments, we choose CNTs/CdS core-shell nanowires as inorganic materials and poly(benzyl-ether) dendrons with thiol functionalities as organic solubilizer. The solubility of CNTs/CdS core-shell nanowires in normal solvents was expected to improve through chemical interactions between core-shell nanowires and solubilizer. The enhanced solubility can improve facility in processability. It also provides a new application method in nanomaterials.

本论文在课题组原有工作的基础上，以制备可溶、易加工的有机-无机复合纳米材料为应用目标，选择具有自己课题组研究特色的CNTs/CdS核壳纳米线结构作为无机材料，选择带巯基的聚苯甲醚树枝状分子作为有机增溶剂，通过带巯基的聚苯甲醚树枝状分子对CNTs/CdS核壳纳米线的化学作用，改善了核壳纳米线在常用有机溶剂中的溶解性能，为材料的湿法加工提供了基础，也为类似纳米材料的应用开拓了一种新的方法。

Chapter II reviews the major research outcomes, evolution, identification, characteristics and inscapes of core competence theory, and clarifies the core competence relationships with enterprises and its integration and management Chapter in defines and identifies the core competence of travel agencies.

其次，简要概括了国内外有关核心竞争力理论的研究成果，包括核心竞争力理论的兴起与发展，核心竞争力的界定、特征和构成要素，还包括了核心竞争力与企业本质，核心竞争力的整合与管理。

The research results show technology core competence impacts the growth of high-tech enterprises positively and directly, so are the inscapes of technology core competence but indirectly by technology core competence.

通过辨析当前典型高技术企业成长模式，从高技术企业成长的维度及其相互关系出发，重构了基于技术核心能力的三维空间高技术企业成长模式，并探讨了其实现机制。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

There had been a moment during the breakfast meeting, though, after the backslapping and the small talk and when all of us were seated, with Vice President Cheney eating his eggs Benedict impassively and Karl Rove at the far end of the table discreetly checking his BlackBerry, that I witnessed a different side of the man.

那次早餐会期间，在表示过关心和寒暄以后，我们所有人坐了下来，我注意观察了一下，副总统切尼面无表情地吃着班尼迪克蛋（Eggs benedict，源自美国，以英式松饼、火腿、水煮蛋以及荷兰酱组合而成），卡尔。罗夫在餐桌的远端谨慎地经常查看他的黑莓手机，我目睹了他所不为人知的一面。

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