查询词典 combinational algorithm

In the analysis of combinational logic circuit, should take into account gate delay time of the impact on the circuit.

在分析组合数字逻辑电路时，应该考虑门电路的延迟时间对电路产生的影响。

Introduction of digital circuit in the combinational logic circuit, individuals think quite good.

详细说明：介绍数字电路中的组合逻辑电路，个人认为挺不错的。

It is also configured for all 3 input logic and some logic between 4 and 7 input,and used for general combinational logic.

该单元还能实现全部 3输入逻辑和部分 4～ 7输入逻辑，也是一种满足通用逻辑应用的结构。

It is well known that any signal coming out of combinational logic is prone to glitch.

众所周知，任何出自组合逻辑的信号都容

A use of task and level-sensitive always block design compared the reorganization of the signal combinational logic example.

详细说明：一个利用task和电平敏感的always块设计比较后重组信号的组合逻辑的实例。

It is no storage, memory function, its output depends only on the input the same time, it is a combinational logic circuit.

它无存贮、记忆功能，其输出只取决于同一时刻的输入，因此属组合逻辑电路。

This method can be used to reduce power dissipation of combinational logic.

本文通过上述问题的研究，在设计流程的不同阶段解决自测试设计的测试功耗问题：在高层综合阶段，引入功耗约束和模块随机响应模型，自动生成低测试功耗、低面积开销的RTL电路结构；在逻辑综合阶段，针对测试功耗分别优化了电路结构和测试向量生成电路，以微小的故障覆盖率和面积开销为代价，最大程度降低测试功耗。

The result shows that it is convenient and efficient in designment, simulation, production of combinational logic circuits based on Multisim.

实践证明，基于Multisim设计组合逻辑电路的效率很高，仿真验证比较方便，对实际电路的制作能带来很大帮助，具有较高的实践指导意义。

A combinational logic element having at least one input channel.

一种至少有一个输入通道的组合逻辑元件。

B Never gate your clock signal with combinational logic.

绝不使用组合逻辑控制时钟信号。

The Master of Science degree program in Economics features a curriculum that is flexibl...

在经济学理学硕士学位的课程计划的特点是灵活而全面的方法，在理论和应用课程培训工作。

This module is used for constructing and visualizing 3D models.

该模块是用于建设和可视化的三维模型。