查询词典 calling processor

The development environment of SoPC technology includes a field programmable gate array and a Nios processor which can be embedded into FPGA.

此SoPC技术之发展环境主要包括一颗可程式逻辑闸阵列元件及嵌入一颗Nios处理器。

For instance, in the direct 3-D CT image reconstruction, the calculating scale, the calculating complexity and freedom of parameters go far beyond the processing capability of array processor used in 2-D medical CT.

七十年代以来，CT技术已经有了长足的发展，医用CT的成功和普及以及工业CT技术的进展使无损检测手段发生了划时代的变化，开创了现代辐射成象技术的新阶段。

The board has merits of strong computation,high data throughput,perfect reconfigurability and can easily be used for construction of large scale array processor.

介绍了ADI公司高性能ADSP TS201的主要特点，并利用其超高性能处理能力和高速链路口，设计了通用并行信号处理板，并以综合脉冲孔径雷达信号处理机为例说明了其应用；该板卡具有运算能力强、数据吞吐量大、可重构性好的优点，易于构建大规模阵列处理机。

In the light of the underlying ideas behind smart antenna and multiuser detection, a novel multi-user detector based on the parallel array constant modulus algorithm processor , and on the adaptive space-time interference cancellation algorithm, is proposed.

将智能天线与多用户检测的思想相结合，提出了以时空盲估计和时空干扰对消为基础的多用户检测算法，该算法充分利用了信号的时域恒模特性和信号时空特征。

By applying programmable device, like Field Programmable Gate Array or Digital Signal Processor etc, more signal processing methods can be carried on to get detail information about target signals.

利用FPGA或DSP等可编程器件对所截获低速率信号进行处理，得到目标信号的详细参数。

They can solve the problems as follows: 1 To combine the systolic array processor with the delay register arrays, they allow serial data input to save the pin counts but perform parallel processing.

在原型阵列的基础上进行结构改进，本文相应完成了三种实用化FSBM脉动阵列的设计。

In this strategy, IPM was used to generate 3-phase power for the AC motor; the WFG unit of 80C196MC was used to generate the control signal of SPWM, A/D convertor unit to complete the sampling of current, and Event Processor Array to complete the detection of speed.

该方案利用受控于单片机的智能功率模块产生电机的三相电压；利用80C196MC单片机中的WFG产生SPWM信号，芯片内的A/D转换器实现电流采样，事件处理器阵列实现了转速检测。

In this thesis, we improve the existing rendering algorithm and propose a power-aware system architecture including three key modules: dynamic task dispatcher, dynamic task scheduler, and 2-stage precision-aware processor array.

在本论文中，我们改良了既有的绘图演算法，并且提出了具备功率感知功能的系统架构。其中包括三个关键模组：动态资料流分派器，动态资料流排程器，以及具备精确度感知的处理器阵列。

Each of the subband signals is then fed into its corresponding subband array processor, of which the outputs are combined by the synthesis filter and recovered into wideband signal.

宽带接收信号经分析滤波器组分成若干子带信号，每个子带信号经各自的子带阵列处理器处理后由综合滤波器恢复成宽带信号。

Processor ; hardware/software codesign ; retargetable compiler ; assembler generator ; system level simulation and emulation

处理器；软硬件协同设计；可重定目标的编译器；汇编器的生成器；系统级模拟和仿真

I can do simple painting, carpentry and plumbing.

我能做简单的油漆、木工和修水管等工作。

The motivations, notations and outline of this work are also given in this chapter.

从这个意义上讲，这些时滞是无害的。然后用实例说明这三个定理的应用和互不包含性。