查询词典 buffer

One element used during processing operations is a high-speed buffer memory that's both faster and more expensive per character stored than primary storage.

它的速度比主存快，但每存储位的成本比主存高。

But by high-speed static RAM buffer composition, structure more complex, in the CPU die area can not be the case too, L1 cache capacity level can not be done too.

不过高速缓冲存储器均由静态RAM组成，结构较复杂，在CPU管芯面积不能太大的情况下，L1级高速缓存的容量不可能做得太大。

This paper presents synchronous FIFO integrated in FPGA which can achieve the function of high-speed buffer and bus synchronous data transmission by high-speed reading-writing operation of the FIFO.

本文提出一种基于FPGA片上集成的高速FIFO实现采集数据的高速缓存并通过对高速FIFO的读写操作实现总线同步数据传输，提高数据的传输速率。

The local monitor module was in charge of monitoring the data changes happened on local host and saving them into high-speed buffer disks.

通过本地监控模块监控数据变化，并将其传输到海量高速缓存中暂存。

But by high-speed static RAM buffer composition, structure more complex, in the CPU die area can not be the case too, L1 cache capacity level can not do too much, L1 cache capacity is generally KB .

不过高速缓冲存储器均由静态RAM组成，结构较复杂，在CPU管芯面积不能太大的情况下，L1级高速缓存的容量不可能做得太大，L1缓存的容量单位一般为KB。

Use Cygnal Inc C8051F120 singlechip to control start-up and stop of system, permission of data acquisition, data transmission etc. Use Altera Inc Cyclone II series EP2C8Q208C7 chip to control buffer of high-speed data and sample of storage etc.

采用Cygnal公司的C8051F120单片机控制系统的启动、停止，数据采集的允许，数据传输等；采用Altera公司CycloneⅡ系列的EP2C8Q208C7芯片控制高速数据的缓存和存储点数等。

The dual channels AD converter AD9238-40 was used as input stage,two asynchronous FIFOs on-chip were used as high-speed buffer memory,and the sampling and adaptive filtering was controlled by FPGA.

仿真结果表明：该方案既能降低系统的成本，又能有效降低高频可能引起的干扰，对于高速实时电路处理具有一定的参考意义。

It combines all the functions of a high-speed switch systemCincluding packet buffer, PHY transceivers, media access controllers, address management and a non-blocking switch fabricCinto a single 0.22um CMOS device.

它结合了高速systemCincluding包缓冲，开关的所有功能的PHY收发器，媒体接入控制器，地址管理和无阻塞交换fabricCinto一个0.22um CMOS器件。

A system for playing the digital video frequency with a changable playing back speed comprises: an acquiring module for acquiring the coded picture from the data memorizer; and a distributor module for selectively deleting the coded picture from the input high-speed buffer.

一种以变化的回放速度播放数字视频的系统可以包括：获取器模块，配置用于从数据存储器中获取编码后的画面；以及分配器模块，配置用于从输入高速缓冲器中选择性地删除编码后的画面。

The dual channels AD converter AD9238 was used as input stage,two asynchronous FIFOs on-chip were used as high-speed buffer memory,and the sampling and adaptive filtering were controlled by FPGA.

采用双通道高速AD器件AD9238作为输入级，用异步FIFO作缓存，用FPGA进行采样滤波控制。

Chimborazo and Cotopaxi, took me by the hand.

越过琴博腊索山和科托帕克西山。

This car is in a good condition.

这辆车的状况很好。