查询词典 binary adder

This procedure is to use two four parallel binary adder cascade manner through an 8-bit adder.

详细说明：本程序是利用两个4位二进制并行加法器通过级联方式构成一个8位加法器。

This is a use of embedded hardware-based high-level language to describe the All-Canadian program to meet the functions of the binary full adder.

详细说明：这是一个基于嵌入式的利用硬件高级描述语言编写的全加器程序，可以满足二进制全加的功能。

It is the hybrid of binary carry look-ahead adder of Brent-Kung~ and the carry select adder.

它结合了Brent-Kung对数超前进位加法器和进位选择加法器的优点，使得加法器的面积和连线减少了50%，而延时与加法器的长度的对数成正比。

This lesson is compulsory curriculum standards of mathematics textbooks under the first year of the fifth element "by Canada and" the first class, is a double-digit increases the number of binary adder.

本节课是义务教育课程标准实验教科书数学一年级下册第五单元《加与减》的第一课时，内容是两位数加一位数的进位加法。

Adder can be used to express a variety of values, such as: BCD, plus three yards, the major is based on a binary adder for computing.

加法器可以用来表示各种数值，如：BCD、加三码，主要的加法器是以二进制作运算。

The course of logic operations of carry lookahead adder for binary number is introduced into optical computation. The carry lookahead by optical parallel processing is proposed.

将二进制数的先行进位全加器的逻辑操作引入到光计算中，提出了用光学并行处理方法实现先行进位全加器逻辑操作的建议。

We can use software to do most calculation but not use hardware. The most basic circuit doing calculation in the computer is binary adder. For example, we can use of addition to do subtracting, continuous adding to do multiplication, and continuous subtracting to do division.

在电脑的世界里，可以做任何数字系统且复杂的演算，但是大多数的演算都藉由软体来解决，而非用硬体直接进行各种演算，电脑的硬体或其他数位电路在做算术运算时，最基本的电路往往只有二进位加法器而已，至於减法可藉由补数的加法解决，乘法等於连续的加法，除法则是连续的减法，可见加法器在运算数位系统中的重要性。

A real time optical logic processor is presented, that can perform binary logic operations in parallel. Experimental result is given of the system as a half adder.

本文提出了一种能实时完成二进制逻辑运算的光学并行处理系统，并给出了作为半加法器的实验结果。

Experiments on multiplier tree and adder tree expressions exhibit running time reduction of 83% to 99%, and 40% to 80% respectively.4. Arithmetic unit check with half adder graph technique: Binary Moment Diagram technique has been used in multiplier equivalence checking.

比如针对加法和乘法连续运算的表达式，算法从实现电路中提取变量顺序和结合顺序并加以利用，实验表明，在验证乘法连续运算的表达式时减少了83%～99%的时间，加法连续运算表达式的验证时间也可减少40%～89%。4。

This dissertation is based on the prefix algorithm of traditional binary system, combines the basic principle of modulo adder, design and realized one kind of new modulo adder.

本文基于传统二进制中的前缀算法，结合模加法器的基本原理，设计并实现了一种新的模加法器。

It goes back to what I told you...

现在回到我告诉过你的。。。

With a supporter in Mr Charest and an admirer in Mr Dumont, Mr Harper may be encouraged to call an election himself.

由于在沙雷那边有个支持者，杜蒙那边有个崇拜者，鼓励哈珀为自己举行一次选举。