查询词典 adder

This conclusion is more practical for the last stage of CSA array multiplier is the 4-bits CLA adder chain.

由于CSA阵列的最后一级为4位CLA加法器链，因此所得结果更具有实用性。

In practice, fast adders such as CLA adder is always used in the last stage of CSA array multiplier to increase its speed.

在实际电路中，为了提高乘法的速度，CSA（Carry-SaveAdder）阵列乘法器的最后一级常采用CLA加法器等快速加法器。

In chapter 4, test for M×N-bits CSA array multiplier with a 4-bits CLA adder chain as its last stage and CC multiplier with 4:2 compressor as its basic cell in the compressor part are studied.

基于以上原因，本论文第4章研究了最后一级为4位CLA加法器链的M×N位CSA阵列乘法器和以4∶2压缩器为基本单元的列压缩乘法器的测试问题。

A logic element designed to act as either an adder or a subtracter in accordance with the control signal applied to it.

根据供给它的控制信号，或起加法器作用或起减法器作用的一种逻辑元件。

The thesis is based on the architecture of All-Digital Frequency and Phase Synthesizer (All-Digital PLL) which is published by Hugh Mair and Liming Xiu. The architecture makes multiple signals of the same frequency and the same phase difference the output of a voltage-control-oscillator to be the internal input of the DCO (flying-adder architecture), and we utilize the control word to decide the desired synchronized output signal.

中文摘要本论文是以Hugh Mair及Liming Xiu所提出之全数位频率与相位合成器架构(All-Digital PLL)为基础来做改良设计，此架构是以多个压控振荡器输出的相同频率及相同相位差的讯号，做为DCO(flying-adder architecture)的内部输出讯号，再以控制位元决定出所欲同步讯号。

Methods event-related potentials, Records of children's mental arithmetic adder listening behavior data and the accuracy of behavior data.

采用事件相关电位方法，记录儿童加法听心算时的反应时和行为数据的正确率。

Modulo adder plays an important role in RNS and it is one of the basic factors for improving the performance of RNS.

本文基于传统二进制中的前缀算法，结合模加法器的基本原理，设计并实现了一种新的模加法器。

The design of the special-purpose 32-bit floating-point RISC chip is a major project of the National Defense Science and Industry Committee of China during the 9th 5-year-plan. This paper studies the design of the datapath in the chip, including low-power design techniques, the design of barrel shifter, adder, incrementer, fixedpoint and floating-point ALU, fixed-point and floating multiplier, and register bank.

本文以国防科工委"九五"期间重点课题专用32位浮点RISC为对象研究了该芯片的数据路径设计，其内容包括低功耗设计技术、桶式移位器、加法器与增值器、浮点算逻部件、定浮点乘法器、寄存器组等的设计等。

Serpents in general are oviparous; the adder, an exceptional case, is viviparous: for not all viviparous animals are hair-coated, and some fishes also are viviparous.

大蛇类通常是卵生的；蝰蛇是一个例外，是胎生的：因为并不是所有胎生动物都是有体毛的，一些鱼也是胎生的。

We also saw numerous side striped skinks and a puff adder.

我们还看到许多方面条纹skinks和粉扑加法。

When this condition occurs, inbound replication with the source partner is stopped on the destination domain controller and event ID 2042 is logged in the Directory Services event log.

计算机密码学是研究计算机信息加密、解密及其变换的科学，是数学和计算机的交义学科，也是一门新兴的学科。

Instructions: click on the thumbnails to see a larger image, then use the left-right arrow keys to scroll through the slideshow.

使用说明：滑鼠点在小图上即可放大观赏。开启后键盘左右键可用来换照片。