查询词典 interrupt request

Equipment and then adjust the "Input / Output range","interrupt request" and "Direct Memory Access" address, so that there is no conflict.

然后调整设备的"输入／输出范围"、"中断请求"和"直接内存访问"地址，使之没有冲突。

If the network card during the installation of three parts, will forcibly occupied yourtablename interrupt request number, and other hardware devices in your computer are forced to occupy the same interrupt request number, IRQ interrupt occurs, the conflict by modifying the computer BIOS system settings in the options parameter, and the network card with conflicting hardware device in which the assigned fixed interrupt request to abort, provided for the other device interrupt request number.

如果网卡在安设时会强行占用某一个洋断哀告号，与计算机洋其他软件摆设所强行占用洋断哀告号不同时，不离会爆发IRQ洋断冲破，堵住编削计算机BIOS编制撤销参数洋的不关选项，不兵与网卡爆发冲破的软件摆设所不合配的变动洋断哀告洋止，供应给该摆设其他洋断哀告号。

You'll learn the details about interrupt request level and about various synchronization primitives that the operating system offers for your use.

你将学习到有关终端请求级别的细节以及操作系统为你的使用提供的各种基本同步。

The system prioritizes the handling of hardware and software interrupts with the interrupt request level.

这个系统使用中断请求级别把硬件处理和软件中断区分优先次序。

Windows XP assigns an interrupt request level to each hardware interrupt and to a select few software events.

Windows XP为每一个硬件中断和一些软件事件选择分配中断请求等级。

Chapter 4," Synchronization ," discusses how your driver can synchronize access to shared data in the multitasking, multiprocessor world of Windows XP. You'll learn the details about interrupt request level and about various synchronization primitives that the operating system offers for your use.

第四章，"同步"，讨论驱动程序怎样在 Windows XP 多任务和多处理器的环境中同步访问共享数据，你将详细地学习 IRQL ，学习用操作系统提供的各种同步原语解决同步问题。

The IRQL is known as the "Interrupt ReQuest Level". The processor will be executing code in a thread at a particular IRQL.

IRQL就是中断请求级别，处理器将会在一个特殊的IRQL的线程中执行代码！

In computing, an interrupt request by a peripheral unit, as opposed to a software interrupt written into a computer program .

在计算机系统中，由外部设备引起的一种中断请求，它与编写在计算机程序中的软件中断不同。

An IRQ is an interrupt request from a device.

IRQ是来自设备的一个中断请求。

Pinout: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Little-endian C Embedded ICE (In-circuit Emulation) 8-, 16- and 32-bit Read and Write Support 256K Bytes of On-chip SRAM C 32-bit Data Bus C Single-clock Cycle Access Fully Programmable External Bus Interface C Maximum External Address Space of 64M Bytes C Up to Eight Chip Selects C Software Programmable 8/16-bit External Data Bus Eight-level Priority, Individually Maskable, Vectored Interrupt Controller C Four External Interrupts, including a High-priority, Low-latency Interrupt Request 32 Programmable I/O Lines Three-channel 16-bit Timer/Counter C Three External Clock Inputs C Two Multi-purpose I/O Pins per Channel Two USARTs C Two Dedicated Peripheral Data Controller Channels per USART Programmable Watchdog Timer Advanced Power-saving Features C CPU and Peripheral Can be Deactivated Individually Fully Static Operation: C 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85C 2.7V to 3.6V I/O Operating Range 1.65V to 1.95V Core Operating Range -40C to +85C Temperature Range Available in 100-lead TQFP Package

M5L8253P-5引脚说明： C型高性能32位RISC架构C高密度以MIPS /瓦C小端C十六位指令集C领袖嵌入式冰8 - 16 -位和32位的读写支持256K的片上SRAM的 32位数据总线C单时钟周期存取字节完全可编程的外部总线接口C最大的外部地址空间的64M字节多达8个C芯片选择C软件可编程8位外部数据总线8级优先级，独立可屏蔽，向量中断控制器C四外部中断，其中包括一个高优先级，低延迟中断要求32个可编程I / O口线三通道16位定时器/计数器C三个外部时钟输入C两多用途I / O引脚每通道2个通用同步C两专用外设数据控制器通道每个USART可编程看门狗定时器先进的节能特性 CPU和外设可停用独立全静态工作中：C 0 Hz至75 MHz的频率范围内的VDDCORE = 1.8，85℃2.7V到3.6VI / O的操作1.65V到1.95V范围核心工作电压范围在- 40C至+85 C温度范围内使用的100引脚TQFP封装

It is also known as one of the most poisonous naturally occurring substances.

它也被称为一个最自然发生的有毒物质。

The greatest stress is found at the location on the cross section where V is the largest.

最大应力出现在横截面上V为最大的地方。