查询词典 data acquisition
- 与 data acquisition 相关的网络例句 [注:此内容来源于网络,仅供参考]
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Therein, by adopting the ISCSI protocol, the local data storage sub-system constructs the circuital access pattern of the taxation data. The system eliminates the unbalance phenomena between the capability and the demand of the data storage under the traditional bus storage pattern. Under the centralized control pattern, it provides the information access and shares service with the great data volume, the high speed of data transportation and the high availability for the taxation system. By remotely building a backup data center that is totally consistent with the local data center on the IT foundational fabric, the remote data backup sub-system uses the geographical dispersibility of the remote data center and adopts the LVR software replication technology. It implements the synchronous data replication between the local and remote data center, changes the zero standing capability on the great disaster event under the single data center pattern and raises the standing capability on the disaster events for the application and data in the taxation system. By adopting the dynamic replication technology between the heterogeneous data source, the heterogeneous data conformity sub-system successfully shields the various heterogeneous ingredients of the present system.
其中,本地数据存储子系统采用ISCSI协议构建了税务数据网络存储模式,消除了传统总线型存储模式下数据存储性能和存储需求之间的失衡现象,在集控管理模式下为税务系统提供了超大数据容量、高数据传输率和高可用性的信息存取和共享服务;远程数据备份子系统通过在异地构建一个和本地数据中心IT基础架构完全一致的备份数据中心,利用远程数据中心在地理上的分散性,基于LVR软件复制技术实现了本地和远程数据中心之间信息的实时同步,改变了过去单一数据中心模式下对大型灾难事件的零抗灾能力,提高了税务系统内应用和数据对灾难性事件的抵御能力;异构数据整合子系统采用异类数据源动态复制技术,成功屏蔽了目前系统内存在的各项异构成分。
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CPU of airborne computer implements existing data acquisition of unpiloted vehicle with low efficiency. To improve the efficiency and to solve problems on reliability, real time and precision, the design of acquisition system based on DSP which can make a circuit acquisition for 54 channels data is put forward. After acquisition, the data can transfer between the system and CPU of airborne computer through dual-port RAM. The software and hardware methods to revise ADC on DSP are described. Evidences show that the system can meet with the flight control system on reliability, real time and precision.
现有无人飞行器数据采集均由机载计算机主处理器完成,效率较低,为了提高效率,解决数据采集的可靠性、实时性及精度等问题,设计了一种基于DSP处理器的数据采集系统,该数据采集系统能够对54路模拟量进行巡回采集,给出了系统的软硬件实现方法,在数据采集结束后,系统通过双端口RAM与机载计算机主处理器进行数据传递;为了提高DSP片内ADC的采集精度,给出了片内ADC的软硬件校正方法;实验证明,该系统具有较高的可靠性,能够满足飞行控制系统对传感器数据采集的实时性及精度要求。
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This paper analyzed data from multiple sources and different structures, concluded three types of info: Login info, Event info, and Packet data info, then created the formation for every type of data; In order to combine future possible new data, IDS using profile and formation string together, create and practice data formation standard algorithm; Because in the collected data, there is info that is redundant or has minor effect on the IDS, this paper discussed the rules of redundant data differentiating and safe data differentiating, Then create data filter rule base; Data collecting system uses distributivity design, collecting module like a black box. we can get data which was filterd and had standard formation, if we created a new model string for new data source. Module work individually; filter data right away at the collecting node.
本文分析了多种来源的、不同结构的数据,将其总结成登录信息、事件信息和网络数据包信息三种类型,并为每种类型的数据设计了固定的格式;为了与将来可能出现的新型数据兼容,采用了配置文件与模式字符串相结合的方法,设计并实现了数据格式标准化算法;由于收集到的数据中存在冗余的信息和对入侵检测影响不大的信息,本文分别讨论了冗余数据辨别规则和安全数据辨别规则,并建立起数据过滤规则库;数据收集系统采用分布式设计,收集器以黑盒形式提供,对新的数据源只需设计一个新的模式字符串,即可得到过滤后的、具有标准格式的数据,各收集器间独立工作;在收集点即对数据进行过滤,只向分析中心报告可疑数据,以减少传输和存储的数据量,降低对网络性能的影响。
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This thesis tries to give an objective and comprehensive description of second culture acquisition, which includes the acquisition model of second culture acquisition, the result of second culture acquisition—interculture, and the "critical period" hypothesis for second culture acquisition.
在此基础上,本文分析第二文化习得的四种方式,描述第二文化习得特有的"中介文化"状态,并提出第二文化习得的"关键期"假说。
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In addition, the company has acquired further 14 such centers across Europe through its October 2004 acquisition of Synstar PLC -- a Bracknell, England, company specializing in IT support services, for $293 million -- and its acquisition of the Irish data recovery activities of Schlumberger Business Continuity Services Ltd in March of this year, it said. In addition, the company has acquired further 14 such centers across Europe through its October 2004 acquisition of Synstar PLC -- a Bracknell, England, company specializing in IT support services, for $293 million -- and its acquisition of the Irish data recovery activities of Schlumberger Business Continuity Services Ltd in March of this year, it said.
此外,该公司已经收购了另外14个这样的中心,整个欧洲通过其2004年10月收购synstar可编程控制器-布莱克内尔,英格兰,公司专门从事资讯科技支援服务,为2 93000000美元-以及其收购的爱尔兰数据恢复活动Schlumberger的业务连续性服务有限公司在今年3月,它说,此外,该公司已经收购了另外14个这样的中心,整个欧洲通过其2004年10月收购synstar可编程控制器-布莱克内尔,英格兰,公司专门从事信息技术支持服务,为293000000美元-以及其收购的爱尔兰数据恢复活动S chlumberger的业务连续性服务有限公司在今年3月,它说。
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This invention discloses a user data process method, which contains 1, judging each data package in IP data steam sent form high layer of empty command protocol stack, if the received IP data package is TCP ACK data package, then executing step 2, if the received data package is not TCP ACK, then executing step 3, 2, making PDCP layer function process to IP data package and ending current process, 3, making flow control to IP data package and then executing 2,, said invention can precedential send TCP ACK data package to opposite part in preserving original TCP/IP and universal mobile telecommunication system data transmission system base, to reduce data package reversion time delay and keep stable data transmission rate.
本发明公开了一种用户面数据处理方法,其主要处理步骤如下:a。对从空口协议栈中高层下发的IP数据流中的每一个数据包进行判断:当前接收到的IP数据包是否为TCP的ACK数据包,对所有是TCP的ACK数据包的IP数据包执行步骤b;对所有不是TCP的ACK数据包的IP数据包执行步骤c;b。对IP数据包进行PDCP层的功能处理,结束当前处理流程;c。对IP数据包进行流控,再转入步骤b。采用本发明方法能够在保持原有TCP/IP和全球移动通信系统数据传输机制的基础上,优先将TCP的ACK数据包发送到对方,从而减少TCP的ACK数据包的回复时延,保证稳定的用户面数据传输速率。
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MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available
MAX1999EEI引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可
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TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available
TDA4864引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可
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There are five kinds of circuit card in it,which build up communication control module,pyrology data acquisition module,electric data acquisition module and switch data acquisition module.
系统中有5种电路板用来组成通信控制模块,热工数据采集模块,电气数据采集模块以及开关数据采集模块。
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Under this background,through colligating the merit and shortcoming of the traditional remote data acquisition terminal, the thesis does research and realization about remote data acquisition system based on the ARM technology and GPRS technology, aiming at the new requirements of data acquisition which has been put forwarded from an enterprise's online sources of pollution automatic monitoring and controlling system.
课题即是此背景下,针对某环保部门对在线污染源自动监控系统中数据采集所提出的需求,综合以往数据采集终端的优缺点,研究并设计了基于ARM和GPRS技术的远程数据采集系统。
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- 推荐网络例句
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A backer of an Afghan law that critics say legalizes marital rape has rejected the international outcry as foreign meddling.
饱受批评的一项法律的拥护者说合法化的婚内暴力不会受国际舆论的干涉。
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Years ago, a ancient Egyptian fleet went to the Land of punt for seeking a kind of flavor named "myrrh", and aromatic plants which has dense exotic style for the queen Hatshepsut.
3500年前的一个古埃及的舰队到&彭特之地&寻找一种叫没药的香料。
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I didn't tell him anything except that I needed the money.
我什么都没告诉他,只是说我需要钱。